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ATmega128
Table 126. Parallel Programming Characteristics, V CC = 5 V ±10% (Continued)
W R Low to RDY/BSY High
W R Low to RDY/BSY High for Chip Erase
Symbol
t XLPH
t PLXH
t BVPH
t PHPL
t PLBX
t W LBX
t PL W L
t BV W L
t W L W H
t W LRL
t W LRH
t W LRH_CE
t XLOL
t BVDV
t OLDV
t OHDZ
Parameter
XTAL1 Low to PAGEL high
PAGEL low to XTAL1 high
BS1 Valid before PAGEL High
PAGEL Pulse W idth High
BS1 Hold after PAGEL Low
BS2/1 Hold after W R Low
PAGEL Low to W R Low
BS1 Valid to W R Low
W R Pulse W idth Low
W R Low to RDY/BSY Low
(1)
XTAL1 Low to OE Low
BS1 Valid to DATA valid
OE Low to DATA Valid
OE High to DATA Tri-stated
(2)
Min
0
150
67
150
67
67
67
67
150
0
3.7
7.5
0
0
Typ
Max
1
5
10
250
250
250
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
μ s
ms
ms
ns
ns
ns
ns
Notes:
1.
t W LRH is valid for the W rite Flash, W rite EEPROM, W rite Fuse bits and W rite Lock bits
commands.
2. t W LRH_CE is valid for the Chip Erase command.
Serial
Downloading
SPI Serial
Programming Pin
Mapping
Both the Flash and EEPROM memory arrays can be programmed using the serial SPI bus while
RESET is p ulled to GND. The serial interface consists of pins SCK, MOSI (input) and MISO (out-
put). After RESET is set low, the Programming Enable instruction needs to be executed first
before program/erase operations can be executed. NOTE, in Table 127 on page 300 , the pin
mapping for SPI programming is listed. Not all parts use the SPI pins dedicated for the internal
SPI interface. Note that throughout the description about Serial downloading, MOSI and MISO
are used to describe the serial data in and serial data out respectively. For Atmel ?
AVR ? ATmega128 these pins are mapped to PDI and PDO.
Even though the SPI Programming interface re-uses the SPI I/O module, there is one important
difference: The MOSI/MISO pins that are mapped to PB2 and PB3 in the SPI I/O module are not
used in the Programming interface. Instead, PE0 and PE1 are used for data in SPI Program-
ming mode as shown in Table 127 .
Table 127. Pin Mapping SPI Serial Programming
Symbol
MOSI (PDI)
MISO (PDO)
SCK
Pins
PE0
PE1
PB1
I/O
I
O
I
Description
Serial data in
Serial data out
Serial clock
300
2467X–AVR–06/11
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